Design of cost-efficient interconnect processing units : Spidergon STNoC
Bookmark
ShareCopied to clipboardDesign of cost-efficient interconnect processing units : Spidergon STNoC is a book. It was written by Marcello Coppola and published by Taylor&Francis in 2018.
Key facts
- author: Marcello Coppola
- publication date: 2018
- book publisher: Taylor&Francis
- book series: System-on-chip design and technologies
- book subjects: Microprocessors, Networks on a chip
See more factsExtract data
Download datasets about Design of cost-efficient interconnect processing units : Spidergon STNoC:
Dataset of books series that contain Design of cost-efficient interconnect processing units : Spidergon STNoC:
Dataset of book subjects that contain Design of cost-efficient interconnect processing units : Spidergon STNoC:
"Design of cost-efficient interconnect processing units : Spidergon STNoC" is one of the books by Marcello Coppola, books by Taylor&Francis and 2,617,384 books in our database.
Related
Connected or similar to Design of cost-efficient interconnect processing units : Spidergon STNoC: .
This dashboard is based on data from: The British Library.
This content is available under the CC BY 4.0 license.